DLD Question bank for all units

DIGITAL LOGIC DESIGN

UNIT-I

1.  A. Convert the following to require form

            a)(163.789)₁₀=()₈     b)(1011011100010.101)₂=()₈      c)(29A7)₁₆=()₂

    B. Find the difference of (3250-72546)₁₀ by using 10’s complement?

    C. what is meant by self complementing codes?

2. Convert the following numbers with the given radix to decimal

   A.4433₆       B.1199₁₂      C.5654₇      D.612₈

3. The binary numbers listed have a sign bit in the leftmost position and if negative are in 1’s                                                           

     Complement form to perform the arithmetic operations indicated and verify the answer

     A.101011+111000       B.001110+110010          C.111001-111010         D.101011-100110

4. What is an error detection code? Write about error detection codes by giving examples.  

     (Gray code-binary, binary-gray code, hamming codes)

5. Perform the subtraction operation by using 2’s complements

   A.11100101-101011      B. (12378)_10-(10230)₁₀

6. Simplify the following Boolean functions

   A.X’YZ+X’YZ’+XY’Z’+XY’Z    B.X’YZ+XY’Z’+XYZ+XYZ’   C.X’Y’Z’+X’YZ’+XY’Z’+XY’Z+XYZ’

7. Obtain the complement of the following Boolean expressions.

   1. A’C’+ABC+AC’     2.(X’Y’+Z)’+Z+XY+WZ    3.A’B(D’+C’D)+B(A+A’CD)

   4. (A’+C)(A’+C’)(A+B+C’D)

8. Convert the following expressions into sum of products and product of sum.

     1. (AB+C)(B+C’D) 2.X’+X(X+Y’)(Y+Z’)         

                                          

UNIT-II

1. Design a 2 input XOR and XNOR using NAND and NOR gates respectively by using only 4 gates

     each?

2. Obtain the simplified expression in sum of products form using K-map method,

       F(A,B,C,D,E)=∑(0,1,4,5,16,17,21,25,29)

3. Simplify the following function and implement it with NAND gates

     F= (B’+D’)(A’+C’+D)(A+B’+C’+D)(A’+B+C’+D’)

4. Implement the following Boolean function using two-level forms

  i) NAND-AND   ii) AND-NOR   iii) OR-NAND   iv) NOR-OR and draw the circuits

  F(A,B,C,D)=π(5,7,9,11,12,13,14,15)

5. Obtain the simplified expression in sum of products form using K-map method &NAND gate level implementation

      (i). F(A,B,C,D)=π (0,4,5,7,8,9,13,15)   (ii) F(A,B,C,D)=π(4,5,6,7,8,12)+d(1,2,3,9,11,14)

6. Obtain the simplified expression in POS form using K-map method &NOR gate level implementation

      (i). F(A,B,C,D)=π (0,4,5,7,8,9,13,15)   (ii) F(A,B,C,D )=π(4,5,6,7,8,12)+d(1,2,3,9,11,14)

UNIT-III

1. Draw the circuit diagram of a full-subtractor  using NOR gates.

2. Write a note on high-speed adders

3. Generate 2’s complement for the given4-bit binary number using full-adders (use only block diagrams for full-adders).

4. Design a priority encoder of 4-bit.

5.implement the following function with multiplexer  F(A,B,C,D)=∑(0,1,3,4,8,9,15)

6. Design a combinational logic circuit to compare two-2-bit binary numbers AB, CD in which A

      Is MSB and D is LSB, to produce an output Z=1 whenever AB<CD .draw the circuit using

      AND gates.

7. Design a full subtractor by using two half subtractors

8. What is decoder? Construct a 4×16 decoder with two 3×8 decoders.

9. write a HDL program to model an 8 bit comparator using 2 bit comparators.

UNIT-IV

1. Distinguish between combinational logic and sequential logic

2. Explain the operation of RS master slave flip-flop. Explain its truth table

3. Draw the circuit diagram of positive edge triggered JK flip-flop with NAND gates and explain its operation using truth-table .how race around condition is eliminated?

4. Explain the procedure for the design of sequential circuits with example.

5.design a sequential circuit with two D flip-flops A and B and one input X. when X=0,the state of the circuit remains the same. When X=1, the circuit goes through the state transitions from 00 to 01 to 11 to 10 back to 00 and repeats.

6. Explain different types of shift registers

7. Draw and explain 4-bit universal shift register

8. Draw the sequential circuit for serial adder using shift registers. full-adder and D-FF.Explain its operation with state equations and state table.

9. Design a modulo-12 up synchronous counter using T-flip-flops and draw the circuit diagram

 10. Design a 4-bit ring counter using D-flipflops and draw the circuit diagram and timing diagrams.

11. Design a 4-bit ring counter using T-flipflops and draw the circuit diagram and timing diagram.

12. Write a HDL behavioral description of shift register.

13 An asynchronous sequential circuit is described by the excitation and output functions

             Y=X₁ X’₂+(X₁+X’₂)Y

              Z=Y                     

    implement the circuit defined above with a NOR SR latch. Repeat with a NAND SR latch.

14. An asynchronous sequential circuit has two internal states and one output. The excitation and output function describing the functions are.

   Y₁=X₁X₂+X₁Y₂’+X₂’Y₁

    Y₂=X₂+X₁Y₁’Y₂+ X₁’Y₁

       Z=X₂+Y₁

(i)Draw the logic diagram of the circuit

(ii) Derive the transition table and output map

(iii) Obtain a flow table for the circuit

15. (i).Explain the difference between asynchronous and synchronous sequential circuits

     (ii)Define fundamental-mode operation

     (iii) Explain the difference between stable and unstable states

     (iv) What is the difference between an internal state and a total state?

UNIT-V

1. Explain about internal construction of 4 × 4 RAM

2. Give the HDL code for a memory read, write operations if the memory sizes 64 words of 4-bits each. Also explain the code

3. What is parity checking? Explain its necessity and how is it implemented

4. Design a combinational circuit using a ROM.the circuit accepts a 3-bit number and generates an output binary number equal to the square of the input number.

5.given  a 32× 8 ROM chip with an enable input, show the external connections necessary to construct a 128×8 ROM with four chips and a decoder.

6. A) implement full-adder circuit using ROM and verify the working

      B) Draw and explain the block diagram of PLA